Both volatile and nonvolatile semiconductor memory devices are known in the art. Volatile semiconductor memory devices store data so long as power is applied to the device. However, when the power is cut off, the data is lost. In contrast, with a non-volatile memory device the data will continue to be stored even after the power to the device is cut off. Examples of conventional nonvolatile memory devices include MASK Read Only Memory devices (MROM), Programmable ROM devices (PROM), Erasable and Programmable ROM devices (EPROM) and Electrically Erasable and Programmable ROM devices (EEPROM).
Most nonvolatile semiconductor memory devices may be reprogrammed to store different data. However, the operations used to erase data in, and then write or “program” new data to, nonvolatile memory devices such as MROM, PROM and EPROM devices are difficult to perform. Consequently, general users of computer or other electronic equipment that use these forms of nonvolatile memory may not be in a position to reprogram the devices to store different data. EEPROM nonvolatile memory devices, on the other hand, may be electrically erased and reprogrammed. As such, EEPROM devices are often used to store system programming code or in supplementary memory device applications where continuous or frequent reprogramming of the non-volatile memory device may be necessary. Flash EEPROM (hereinafter, referred to as a flash memory device) may have a high-integration density as compared to other conventional EEPROM devices. As such, flash memory devices are frequently used as high capacity supplemental memory devices. NAND type flash memory devices are frequently used because they may have a higher integration density as compared to NOR type flash memory devices.
FIG. 1 depicts the array structure 100 of a conventional NAND type flash memory device. As shown in FIG. 1, the NAND type flash memory device includes a memory cell array 100 that is used to store information (data). The memory cell array is categorized into a main region or field 10 and a spare region or field 20. While the memory cell array 100 in FIG. 1 corresponds to one memory block, typically many memory blocks are provided within a memory cell array. Information regarding the main field 10 and other general information relating to the flash memory device is stored in the spare field 20. This information may include, for example, error-correction codes, device codes, marker codes, page information and the like. The main and spare fields 10 and 20 of the memory cell array 100 comprise a plurality of cell strings 1. These cell strings may also be referred to as NAND strings.
The flash memory device may further include a page buffer circuit (not shown in FIG. 1) that may be used for programming data into the memory cell array 100 or reading data from the memory cell array 100. Typically, the memory cell of a NAND type flash memory device is erased or programmed using Fowler-Nordheim tunneling currents. Methods of erasing and programming NAND type flash EEPROM devices are disclosed, for example, in U.S. Pat. No. 5,473,563, entitled “Nonvolatile Semiconductor Memory” and U.S. Pat. No. 5,696,717, entitled “Nonvolatile Integrated Circuit Memory Devices Having Adjustable Erase/Program Threshold Voltage Verification Capability”, the contents of each of which are hereby incorporated herein by reference.
To store data in the main field 10, a data loading command is applied to the flash memory device and then address information and the data that is to be stored is provided to the device. Generally, the data that is to be stored or “programmed” into the flash memory device is transmitted to the page buffer circuit in units of bytes or words in the sequence that the data is to be stored. The data stored in the page buffer circuit may be programmed into the memory cell array (i.e., memory cells of a selected page) in response to a program command.
After the memory cells of the selected page are programmed, a verification operation is performed to evaluate whether or not the memory cells of the selected page were programmed correctly. If the verification operation indicates that the memory cells of the selected page were programmed correctly, then information relating to the verification operation is programmed into a specific region (e.g., a spare field) of the device. This information indicating the results of the verification operation is called “page information” or a “confirm mark.” The page information for each of the pages WL0-WLm may be stored in a specific string of the spare field 20. By way of example, in the nonvolatile memory device of FIG. 1, the page information may be stored in the string that includes the circled cells M0′, M1′ . . . Mm′. Thus, in the example of FIG. 1, the page information corresponding to the first page WL0 may be stored in memory cell M0′ of a string connected to a spare bit line SBL0, the page information corresponding to the second page WL1 may be stored in memory cell M1′ of the string connected to a spare bit line SBL0, and the page information corresponding to the last page WLm may be stored in memory cell Mm′ of the string connected to a spare bit line SBL0.
As discussed above, with conventional data programming methods two data programming operations are performed to store one page of data. The first operation is the normal programming operation that is used to store the data in the memory cells of the main field 10. The second operation is the programming operation that is performed to store the page information or the confirm mark in the spare field 20, where this “page information” or “confirm mark” indicates whether or not the memory cells were correctly programmed in the main field 10. With this programming scheme, the time required to program one page of data may be twice the time required to store the information in the cells of the main field. Thus, for example, if the memory cell array includes 32 pages (or word lines), a total of 64 program operations may be required to store the 32 pages of data in the memory cell array. Thus, the above-described programming method may limit the operation speed of the flash memory device. To speed up the operation of the device, more than one confirm mark may be programmed at a time.
Power to the flash memory device may be cut unexpectedly during programming. When the power is restored, a confirmation operation may be performed to determine whether or not the previously programming operation(s) were performed normally. This may be accomplished by checking the value programmed into the cell of the spare field that comprises the confirm mark that corresponds to a previously programmed page of the main field. However, as discussed above, the confirm mark is programmed after the user data is programmed into the main field of the device. Consequently, if the power is interrupted after the user data is programmed into the memory cells in the main field but before the confirm mark is programmed, the data programmed in the main field may be lost (i.e., may be re-programmed) even though the memory cells in the main field, were programmed correctly. This data loss may be compounded in situations where a plurality of confirm marks are programmed simultaneously.